One terabit optical ethernet

Coming to a point-of-presence near you in the near future.

From the link:

Researchers with the Terabit Optical Ethernet Center (TOEC) at the University of California, Santa Barbara (UCSB) are aiming for 1 Terabit Ethernet over optical fiber — 1 trillion bits per second — by 2015 and 100 Terabit Ethernet by 2020. Partnering with TOEC as founding industry affiliates are Google Inc., Verizon, Intel, Agilent Technologiesand Rockwell Collins Inc.

Ethernet is constantly evolving, but soon — in as little as five years, according to some estimates — it won’t be able to keep up with the speed and bandwidth required for applications like video and cloud computing, and distributed data storage. “Based on current traffic growth, it’s clear that 1 Terabit per second trunks will be needed in the near future,” says Stuart Elby, Vice President of Network Architecture for Verizon.

Current Ethernet technologies can’t be pushed much past 100 Gigabits per second — the speed that’s beginning to be implemented now — mainly because of the amount of power needed to run and cool the required systems, says Daniel Blumenthal, Professor of Electrical and Computer Engineering at UCSB and Director of TOEC. Large data centers can consume as much power as a small city. New generations of Ethernet need to be much more energy-efficient and cost-effective, or the power problem will limit Ethernet development, crippling the growth of key U.S. industries and technologies.

 

Fiber optics on a chip

Now, this is really interesting (and to be fair to the story, the fiber ops are replacing wiring, the chip is key component in allowing this to happen.)

From the link:

The world of computing could change rapidly in coming years thanks to technology that replaces the metal wiring between components with faster, more efficient fiber-optic links.

“All communications over long distance are driven by lasers, but you’ve never had it inside devices,” says Mario Paniccia, director of Intel’s photonics lab in Santa Clara, CA. “Our new integrated optical link makes that possible.”

Paniccia’s team has perfected tiny silicon chips capable of encoding and decoding laser signals sent via fiber optics. Today, when data arrives at a computer via a fiber optic connection it has to be moved from a separate photonic device to an electronic circuit. This new system promises to speed things up because everything works in silicon.

Last week, Paniccia’s team demonstrated the first complete photonic communications system made from components fully integrated into silicon chips. Electronic data piped into one chip is converted into laser light that travels down an optical fiber and is transferred back into electrical signals a few fractions of a second later. The system can carry data at a rate of 50 gigabytes per second, enough to transfer a full-length HD movie in less than a second.

The silicon photonic chips could replace the electronic connections between a computer’s key components, such as its processors and memory. Copper wiring used today can carry data signals at little more than 10 gigabytes per second. That means critical components like the central processing unit and the memory in a server cannot be too far apart, which restricts how computers can be built.

Seeing the light: A chip in the center of this circuit board contains four lasers that convert electrical signals into light pulses. The pulses travel at high speeds along a fiber-optic link. Credit: Intel

Nanotech and power storage

Via KurzweilAI.net –Increasing power storage efficiency is a very necessary element to upping the personal electronics ante. We truly are starting to get up against various roadblocks with different areas of tech, be it battery life, processing speed, memory or something else. I always enjoy reading and blogging about nanotechnology pushing the consumer electronics envelope.

Intel lab explores nanoscale power storage

EE Times, Feb. 17, 2010 Intel researchers are exploring nanoscale materials that could be used to create ultracapacitors with a greater energy density than today’s lithium ion batteries. If successful, the new materials could be mass-produced to power systems for applications including mobile devices,energy sensing, interconnects for plug-in electric vehicles, and smart grid storage units. Read Original Article>>

“Smart dust”

Via KurzweilAI.net — Not certain how I feel about this. Seems like a lot of potential for abuse.

Smart Dust? Not Quite, but We’re Getting There

New York Times, Jan. 30, 2010 While smart dust* is not here yet, smaller, faster and cheaper technology has reached the point where sensors may soon as powerful as tiny computers. One example: Intel is developing RFID technology that adds an accelerometer and programmable chip in a millimeter-sized package, powered by ambient radio power from television, FM radio and WiFi networks. * Tiny digital sensors, strewn around the globe, gathering information and communicating with powerful computer networks to monitor, measure and understand the physical world Read Original Article>>

Intel hit with almost $1.5 B antitrust fine

Courtesy of EU regulators. Ouch. South Korea and Japan are next in the antitrust line, and this move by the EU might force the hand of the U.S. government as well.

Numonyx developing new flash memory

In a down market one company is still innovating.

From the Technology Review link:

Flash memory is a major reason for the ubiquity of handheld gadgets, from MP3 players to video games. But this year has been rough on companies that manufacture flash memory chips. Supply is outstripping demand, as the economic downturn has many people postponing purchase of the newest gadgets. Research firm iSuppli projects that worldwide flash revenue will plummet 14 percent in 2008 and slip another 15 percent in 2009. And Toshiba, the second-largest flash manufacturer, announced that it would slash production by 30 percent next year, after posting the lowest profit in four years.

Amid all this turmoil, however, Swiss memory startup Numonyx has announced a slew of new high-capacity flash products that cover a broad range of applications. There are chips designed to be integrated into devices such as mobile phones and navigation systems, added as storage in computers, and used in high-capacity memory cards.

The new chips have transistors that measure only 41 nanometers across, down from the 48 to 57 nanometers of Numonyx’s previous chips. Fabio Gualandris, vice president and general manager of the data management group at Numonyx, says that the 41-nanometer chips indicate the company’s rapid progress since April, when it was launched to commercialize technology from Intel and STMicroelectronics.

USS Liberty document dump

Looks like a lot of government material surrounding the USS Liberty incident — for those who don’t know, that was a 1967 attack on a US Navy intelligence ship by the Israeli airforce. To this day it’s not certain whether it was a horrible accident, or a brazen military strike by Israel against an ally.

Ambinder has a link to the doc dump and some insight:

From the link:

On Monday, thanks to the National Security Archive, the National Security Agency released thousands of pages from its enormous, official, classified history of the nation’s signal intelligence and communications security operations during the code war. Its author is Dr. Thomas Johnson, the agency’s official historian.

Also from the link:

The entire history, which will take us afficiandos a while to pluck through, was once classified as Top Secret Umbra, with Umbra denoting intelligence of a specific level of sensitivity. At the bottom of the document, the reader is instructed to Handle Via Talent-Keyhole Comint Channels Jointly.  For those who aren’t intel fetishists, Talent-Keyhole is a category designation of sensitive compartmented information that deals with signals intelligence. Talent information deals with aircraft-gathered intelligence; Keyhole denotes imagery (imint) from satellites. Comint refers to sensitive signals intelligence methods and sources. Basically, the history was written at a level of classification that basically forbid even many intelligence professionals from reading it.

Of course, that’s all been declassified. Or most of it — the documents are studded with fascinating redactions…

Nanotech process to improve computers

This nanoscale process will make computers smaller, faster and more efficient. Sounds good to me.

From the link:

Scientists at the University of California, Santa Barbara have made a major contribution to this field by designing a new nanotechnology that will ultimately help make computers smaller, faster, and more efficient. The new process is described in today’s Science Express, the online version of the journal Science.
For the first time, the UCSB scientists have created a way to make square, nanoscale, chemical patterns –– from the bottom up –– that may be used in the manufacture of integrated circuit chips as early as 2011. It is called block co-polymer lithography.

Five leading manufacturers, including Intel and IBM, helped fund the research at UCSB, along with the National Science Foundation and other funders. The university has already applied for patents on the new methods developed here, and it will retain ownership.

Atomic Force Microscope image of a square array of 15nm pores formed by the new technology.

Nanopencil offers terabit of data storage

Pretty amazing bit of nanotech.

From the PhysOrg link:

The probe’s tip can write bit sizes with radii as small as 6.8 nanometers, allowing for a nonvolatile memory density of 1 Tbit/in². With improvements, such technology has been predicted to realize storage density of 10 Tbits/in².

This isn’t the first time that carbon nanotubes have been used as scanning probes for writing and reading data. However, the researchers, consisting of a team from Intel Corporation in Santa Clara, California, and the California Institute of Technology in Pasadena, California, made some improvements to enhance the performance and lifetime of the device.

While carbon nanotubes have strong mechanical and wear-resistant properties, one of the biggest challenges of using nanotubes as data storage read-and-write devices is that they’re still prone to bending and buckling after significant use. By coating the carbon nanotube with a 65-nm-thick layer of silicon-oxide, the researchers discovered that they could greatly increase the probe’s mechanical strength. In a sense, the improvement is the equivalent of putting wood around a long, thin stick of graphite in a regular pencil. After depositing the protective silicon-oxide sheath, the researchers used a diamond to “sharpen” the nanopencil to expose the carbon nanotube electrode.

Image of the 870-nm-long nanopencil taken with a transmission electron microscope. The inset shows the carbon nanotube electrode protruding from the silicon-oxide sheath. Credit: Noureddine Tayebi, et al.

Ferroelectric domain patterns written by a nanopencil probe with 6V pulses. Credit: Noureddine Tayebi, et al.

Petascale supercomputer!

From KurzweilAI.net — Yowzaa!

This petascale (one petaflop by 2009 and maybe 10 by 2012) computer project, known as Pleiades, combines the forces of NASA Ames, Intel and SGI.

Massive $208 million petascale computer gets green light

Network World, Sep. 2, 2008 NASAAmes, Intel and SGI will work together on a project called Pleiades to develop a system with a capacityof one Petaflops peak performance by 2009 and a systemwith a peak performance of 10 Petaflops by 2012. And the 200,000 processor core system known as Blue Waters got the green lightrecently as the University of Illinois at Urbana-Champaign and its National Center for Supercomputing Applications (NCSA) said it has finalized the contract with IBMto build the world’s first sustained petascale computational system, delivering sustained performance of more than one petaflop on many real-world scientific and engineering applications. The system may be used to study complex processes like the interaction of the Sun’s coronal mass ejections with the Earth‘s magnetosphere and ionosphere; the formation and evolution of galaxies in the early universe; understanding the chains of reactions that occur with living cells; and the design of novel materials.   Read Original Article>>

Chinese researchers developing four core microprocessor

From KurzweilAI.net — This chip, called Godson-3, is a challenge to Intel.

A Chinese Challenge to Intel

Technology Review, Sep. 1, 2008 Chinese researchers have unveiled details of Godson-3, a scalable microprocessor with four cores (work in parallel) that they hope will bring personal computing to most ordinary people in China by 2010, with an eight-core version in development.   Read Original Article>>

Singularity Summit 2008

From KurzweilAI.net — Here’s the lineup for Singularity Summit 2008. Keynote speakers include Ray Kurzweil and Justin Rattner, CTO of Intel.

Intel CTO and Ray Kurzweil Among Visionaries Headlining Singularity Summit 2008

KurzweilAI.net, Aug. 29, 2008 Singularity Summit 2008: Opportunity, Risk, Leadership takes place October 25 at the Montgomery Theater in San Jose, CA, the Singularity Institute for Artificial Intelligence plans to announce today. Keynotes will include Ray Kurzweil, updating his predictions in The SingularityIs Near, and Intel CTO Justin Rattner, who thinks the gap between humans and machines will close by 2050. Singularity Summit 2008 will feature an impressive lineup: * Dr. Ruzena Bajcsy, pioneering AI and robotics researcher * Dr. Eric Baum, AI researcher, author of What is Thought? * Marshall Brain, founder of HowStuffWorks.com, author of Robotic Nation * Dr. Cynthia Breazeal, robotics professor at MIT, creator of Kismet * Dr. Peter Diamandis, chair and CEO of X PRIZE Foundation * Esther Dyson, entrepreneur, investor, philanthropist * Dr. Pete Estep, chair and CSO of Innerspace Foundation * Dr. Neil Gershenfeld, director of MIT Center for Bits and Atoms, author of Fab * Dr. Ben Goertzel, CEO of Novamente, director of researchat SIAI * John Horgan, science journalist, author of The Undiscovered Mind * Ray Kurzweil, CEO of Kurzweil Technologies, author of The Singularity is Near * Dr. James Miller, author of forthcoming book on Singularity economics * Dr. Marvin Minsky, one of AI‘s founding fathers, author of The Emotion Machine * Dr. Dharmendra Modha, cognitive computing lead at IBMAlmaden Research Center * Bob Pisani, news correspondent for financial news networkCNBC * Justin Rattner, VP and CTO of Intel Corporation * Nova Spivack, CEO of Radar Networks, creator of Twine semantic-web application * Peter Thiel, president of Clarium, managing partner of Founders Fund * Dr. Vernor Vinge, author of original paper on the technological Singularity * Eliezer Yudkowsky, researchfellow at SIAI, author of Creating Friendly AI * Glenn Zorpette, executive editor of IEEE Spectrum

Solar moratorium news, nanowire memory and tiny, tiny computer chips

From KurzweilAI.net — the US government comes to its senses on the solar moratorium, breakthroughs in nanowire memory, and computer chips heading toward smaller than 10 nanometers.

U.S. Lifts Moratorium on New Solar Projects

New York Times, July 3, 2008 Under increasing public pressure over its decision to temporarily halt all new solar development on public land, the Bureau of Land Management said Wednesday that it was lifting the freeze, barely a month after it was put into effect. See also: Citing Need for Assessments, U.S. Freezes Solar Energy Projects   Read Original Article>>

 

New Nanowire-Based Memory Could Beef Up Information Storage

PhysOrg.com, July 2, 2008 University of Pennsylvania researchers have created a type of nanowire-based information storage device that is capable of storing three bit values rather than the usual two. This ability could lead to a new generation of high-capacity information storage for electronic devices. The phase changes are achieved by subjecting the nanowires to pulsed electric fields. This process heats the nanowires, altering the core and shell structure from crystalline (ordered) to amorphous (disordered). These two states correspond to two different electrical resistances. The third value corresponds to the case where the core is amorphous while the shell is crystalline (or visa versa), resulting in an intermediate resistance. Creating information storage from nanowires can be done via “bottom-up” approaches, using the natural tendency of tiny structures to self-assemble into larger structures, so they may be able to break free of the limitations faced by traditional “top-down” methods, such as patterning a circuit onto a silicon wafer by depositing a nanowire thin film.   Read Original Article>>

 

Intel’s Gelsinger Sees Clear Path To 10nm Chips

ChannelWeb, June 30, 2008 Intel sees a “clear way” to manufacturing chips under 10 nanometers, according to Pat Gelsinger, VP of Intel’s Digital Enterprise Group. The next die shrink milestone will be the 32nm process, set to kick off next year, followed by 14nm a few years after that and then sub-10nm, he said.   Read Original Article>>

Solid state drives and pliable nanomaterial

Two interesting bits of news from KurzweilAI.net today.

The first is Intel announces 160 gig solid state drives are soon to market.

The second covers somewhat surprising physical properties of nanomaterials.

Intel confirms 160GB solid-state drives will be unveiled soon

Computerworld, Mar. 11, 2008Intel is close to unveiling a new line of solid-state drives for laptop and notebook PCs that will feature a storage capacity up to 160GB, putting solid-state drives in direct competition with hard drives. Read Original Article>>

Nanomaterials show unexpected strength under stress

Nanowerk News, Mar. 12, 2008University of Maryland-College Park and NIST researchers have discovered that materials such as silica that are quite brittle in bulk form behave as ductile as gold at the nanoscale. At the macroscale, the point at which a material will fail or break depends on its ability to maintain its shape when stressed. The atoms of ductile substances are able to shuffle around and remain cohesive for much longer than brittle substances containing faint structural flaws that act as failure points. At the nanoscale, these structural flaws do not exist, and hence the materials are nearly “perfect.” Read Original Article>>