David Kirkpatrick

October 16, 2010

Cool nanotech image — graphene

Filed under: et.al., Science, Technology — Tags: , , , , , — David Kirkpatrick @ 9:12 am

Actually the accompanying article is pretty cool, too, so do take the time to check it out.

But now, the image …

This image of a single suspended sheet of graphene taken with the TEAM 0.5, at Berkeley Lab’s National Center for Electron Microscopy shows individual carbon atoms (yellow) on the honeycomb lattice.

Also from the link:

In the current study, the team made graphene nanoribbons using a nanowire mask-based fabrication technique. By measuring the conductance fluctuation, or ‘noise’ of electrons in graphene nanoribbons, the researchers directly probed the effect of quantum confinement in these structures. Their findings map the electronic band structure of these graphene nanoribbons using a robust electrical probing method. This method can be further applied to a wide array of nanoscale materials, including graphene-based electronic devices.

“It amazes us to observe such a clear correlation between the noise and the band structure of these graphene nanomaterials,” says lead author Guangyu Xu, a physicist at University of California, Los Angeles. “This work adds strong support to the quasi-one-dimensional subband formation in graphene nanoribbons, in which our method turns out to be much more robust than conductance measurement.”

One more bit from the link, from the intro actually:

In last week’s announcement of the Nobel Prize in Physics, the Royal Swedish Academy of Sciences lauded graphene’s “exceptional properties that originate from the remarkable world of quantum physics.” If it weren’t hot enough before, this atomically thin sheet of carbon is now officially in the global spotlight.

So expect to hear a lot more about graphene in the coming months. Of course if you’re a regular reader of this blog, you’ve been getting a pretty steady (aside from the last month of light blogging) diet of graphene since almost day one (since February 2008 to be exact).

April 8, 2010

Direct chemical vapor deposition used to create graphene

This development from the Lawrence Berkeley National Laboratory is a major breakthrough toward commercializing graphene. The link goes to a news release on this development, but it also serves as a very nice quick-hit primer on graphene as a material.

The release:

Graphene Films Clear Major Fabrication Hurdle

APRIL 08, 2010

Lynn Yarris

Graphene, the two-dimensional crystalline form of carbon, is a potential superstar for the electronics industry. With freakishly mobile electrons that can blaze through the material at nearly the speed of light – 100 times faster than electrons can move through silicon – graphene could be used to make superfast transistors or computer memory chips. Graphene’s unique “chicken wire” atomic structure exhibits incredible flexibility and mechanical strength, as well as unusual optical properties that could open a number of promising doors in both the electronics and the photonics industries. However, among the hurdles preventing graphite from joining the pantheon of star high-tech materials, perhaps none looms larger than just learning to make the stuff in high quality and usable quantities.

“Before we can fully utilize the superior electronic properties of graphene in devices, we must first develop a method of forming uniform single-layer graphene films on nonconducting substrates on a large scale,” says Yuegang Zhang, a materials scientist with the Lawrence Berkeley National Laboratory (Berkeley Lab). Current fabrication methods based on mechanical cleavage or ultrahigh vacuum annealing, he says, are ill-suited for commercial-scale production. Graphene films made via solution-based deposition and chemical reduction have suffered from poor or uneven quality.

Zhang and colleagues at Berkeley Lab’s Molecular Foundry, a U.S. Department of Energy (DOE) center for nanoscience, have taken a significant step at clearing this major hurdle. They have successfully used direct chemical vapor deposition (CVD) to synthesize single-layer films of graphene on a dielectric substrate. Zhang and his colleagues made their graphene films by catalytically decomposing hydrocarbon precursors over thin films of copper that had been pre-deposited on the dielectric substrate. The copper films subsequently dewetted (separated into puddles or droplets) and were evaporated. The final product was a single-layer graphene film on a bare dielectric.

“This is exciting news for electronic applications because chemical vapor deposition is a technique already widely used in the semiconductor industry,” Zhang says.

“Also, we can learn more about the growth of graphene on metal catalyst surfaces by observing the evolution of the films after the evaporation of the copper. This should lay an important foundation for further control of the process and enable us to tailor the properties of these films or produce desired morphologies, such as graphene nanoribbons.”

Zhang and his colleagues have reported their findings in the journal Nano Letters in a paper titled, “Direct Chemical Vapor Deposition of Graphene on Dielectric Surfaces.” Other co-authors of this paper were Ariel Ismach, Clara Druzgalski, Samuel Penwell, Maxwell Zheng, Ali Javey and Jeffrey Bokor, all with Berkeley Lab.

In their study, Zhang and his colleagues used electron-beam evaporation to deposit copper films ranging in thickness from 100 to 450 nanometers. Copper was chosen because as a low carbon solubility metal catalyst it was expected to allow better control over the number of graphene layers produced. Several different dielectric substrates were evaluated including single-crystal quartz, sapphire, fused silica and silicon oxide wafers. CVD of the graphene was carried out at 1,000 degrees Celsius in durations that ranged from 15 minutes up to seven hours.

“This was done to allow us to study the effect of film thickness, substrate type and CVD growth time on the graphene formation,” Zhang says.

A combination of scanning Raman mapping and spectroscopy, plus scanning electron and atomic force microscopy confirmed the presence of continuous single-layer graphene films coating metal-free areas of dielectric substrate measuring tens of square micrometers.

“Further improvement on the control of the dewetting and evaporation process could lead  to the direct deposition of patterned graphene for large-scale electronic device fabrication, Zhang says. “This method could also be generalized and used to deposit other two-dimensional materials, such as boron-nitride.”

Even the appearance of wrinkles in the graphene films that followed along the lines of the dewetting shape of the copper could prove to be beneficial in the long-run. Although previous studies have indicated that wrinkles in a graphene film have a negative impact on electronic properties by introducing strains that reduce electron mobility, Zhang believes the wrinkles can be turned to an advantage.

“If we can learn to control the formation of wrinkles in our films, we should be able to modulate the resulting strain and thereby tailor electronic properties,” he says.

“Further study of the wrinkle formation could also give us important new clues for the formation of graphene nanoribbons.”

This work was primarily supported by the DOE Office of Science.

The Molecular Foundry is one of the five DOE Nanoscale Science Research Centers (NSRCs), premier national user facilities for interdisciplinary research at the nanoscale.  Together the NSRCs comprise a suite of complementary facilities that provide researchers with state-of-the-art capabilities to fabricate, process, characterize and model nanoscale materials, and constitute the largest infrastructure investment of the National Nanotechnology Initiative.  The NSRCs are located at DOE’s Argonne, Brookhaven, Lawrence Berkeley, Oak Ridge and Sandia and Los Alamos National Laboratories.

Berkeley Lab is a U.S. Department of Energy national laboratory located in Berkeley, California. It conducts unclassified scientific research and is managed by the University of California. Visit our website at www.lbl.gov.

Additional Information

A copy of the Nano Letters paper “Direct Chemical Vapor Deposition of Graphene on Dielectric Surfaces” can be viewed here: http://pubs.acs.org/doi/abs/10.1021/nl9037714

For more about Berkeley Lab’s Molecular Foundry visit http://foundry.lbl.gov/

For more about the DOE NSRCs visit http://nano.energy.gov

Left panel (a) an optical image of a CVD graphene film on a 450 nanometer copper shows the finger morphology of the metal; panel (b) is Raman 2D band map of the graphene film between the metal fingers, over the area marked by the red square in (a). (image from says Yuegang Zhang)

(a) Optical image of a CVD graphene film on a copper layer showing the finger morphology of the metal; (b) Raman 2D band map of the graphene film between the copper fingers over the area marked by the red square on left. (image from Yuegang Zhang)

To make a graphene thin film, Berkeley researchers (a) evaporated a thin layer of copper on a dielectric surface; (b) then used CVD to lay down a graphene film over the copper. (c) The copper dewets and evaporates leaving (d) a graphene film directly on a dielectric substrate.

To make a graphene thin film, Berkeley researchers (a) evaporated a thin layer of copper on a dielectric surface; (b) then used CVD to lay down a graphene film over the copper. (c) The copper dewets and evaporates leaving (d) the graphene film directly on the dielectric substrate.

February 27, 2010

Graphene nanomesh may be the semiconductor solution

I’ve done tons of blogging on graphene and this news seems to be direct competition with this graphene news I covered about a week ago. The issue is turning graphene into a semiconductor to allow the material to eventually replace silicon in electronic devices. The last link up there goes to a post outlining the concept of using nanoribbons of graphene, the middle link goes to research claiming a “nanomesh” is a superior method of turning the carbon nanomaterial into a semiconductor.

The release:

New graphene ‘nanomesh’ could change the future of electronics

Graphene, a one-atom-thick layer of a carbon lattice with a honeycomb structure, has great potential for use in radios, computers, phones and other electronic devices. But applications have been stymied because the semi-metallic graphene, which has a zero band gap, does not function effectively as a semiconductor to amplify or switch electronic signals.

While cutting graphene sheets into nanoscale ribbons can open up a larger band gap and improve function, ‘nanoribbon’ devices often have limited driving currents, and practical devices would require the production of dense arrays of ordered nanoribbons — a process that so far has not been achieved or clearly conceptualized.

But Yu Huang, a professor of materials science and engineering at the UCLA Henry Samueli School of Engineering and Applied Science, and her research team, in collaboration with UCLA chemistry professor Xiangfeng Duan, may have found a new solution to the challenges of graphene.

In research to be published in the March issue of Nature Nanotechnology (currently available online), Huang’s team reveals the creation of a new graphene nanostructure called graphene nanomesh, or GNM. The new structure is able to open up a band gap in a large sheet of graphene to create a highly uniform, continuous semiconducting thin film that may be processed using standard planar semiconductor processing methods.

“The nanomeshes are prepared by punching a high-density array of nanoscale holes into a single or a few layers of graphene using a self-assembled block copolymer thin film as the mask template,” said Huang.

The nanomesh can have variable periodicities, defined as the distance between the centers of two neighboring nanoholes. Neck widths, the shortest distance between the edges of two neighboring holes, can be as low as 5 nanometers.

This ability to control nanomesh periodicity and neck width is very important for controlling electronic properties because charge transport properties are highly dependent on the width and the number of critical current pathways.

Using such nanomesh as the semiconducting channel, Huang and her team have demonstrated room-temperature transistors that can support currents nearly 100 times greater than individual graphene nanoribbon devices, but with a comparable on-off ratio. The on-off ratio is the ratio between the currents when a device is switched on or switched off. This usually reveals how effectively a transistor can be switched off and on.

The researchers have also shown that the on-off ratio can be tuned by varying the neck width.

“GNMs can address many of the critical challenges facing graphene, as well as bypass the most challenging assembly problems,” Huang said. “In conjunction with recent advances in the growth of graphene over a large-area substrate, this concept has the potential to enable a uniform, continuous semiconducting nanomesh thin film that can be used to fabricate integrated devices and circuits with desired device size and driving current.

“The concept of the GNM therefore points to a clear pathway towards practical application of graphene as a semiconductor material for future electronics. The unique structural and electronic characteristics of the GNMs may also open up exciting opportunities in highly sensitive biosensors and a new generation of spintronics, from magnetic sensing to storage,” she said.

###

The study was funded in part by Huang’s UCLA Henry Samueli School of Engineering and Applied Science Fellowship.

The UCLA Henry Samueli School of Engineering and Applied Science, established in 1945, offers 28 academic and professional degree programs, including an interdepartmental graduate degree program in biomedical engineering. Ranked among the top 10 engineering schools at public universities nationwide, the school is home to seven multimillion-dollar interdisciplinary research centers in wireless sensor systems, nanotechnology, nanomanufacturing and nanoelectronics, all funded by federal and private agencies.

For more news, visit the UCLA Newsroom and follow us on Twitter.

February 18, 2010

Graphene replacing silicon — is it “when” and not “if?”

Not quite yet, but headway is being made in making graphene the successor to silicon as the semiconductor for electronics. I first blogged about graphene replacing silicon back in late March 2008 (this blog wasn’t even three months old at the time — hit the link and dig the crazy layout I was using for KurzweilAI posts).

From the first link, the latest news — both good and bad — in making graphene the semiconductor of choice:

“Graphene has been the subject of intense focus and research for a few years now,” Philip Kim tells PhysOrg.com. “There are researchers that feel that it is possible that graphene could replace silicon as a semiconductor in electronics.”

Kim is a scientist at Columbia University in New York City. He has been working with Melinda Han and Juliana Brant to try and come up with a way to make  a feasible replacement for silicon. Toward that end, they have been looking at ways to overcome some of the problems associated with using graphene as a semiconductor in . They set forth some ideas for electron transport for graphene in : “ in Disordered Graphene Nanoribbons.”

“Graphene has high mobility, and less scattering than silicon. Theoretically, it is possible to make smaller structures that are more stable at the nanolevel than those made from silicon,” Kim says. He points out that as electronics continue to shrink in size, the interest in finding viable alternatives to silicon is likely to increase. Graphene is a good candidate because of the high  it offers, its stability on such a small scale, and the possibility that one could come up with different device concepts for electronics.

And here’s a bonus fun graphene graphic from the link:

Graphene A

Graphene is an atomic-scale honeycomb lattice made of carbon atoms. By Dr. Thomas Szkopek, via Wikipedia

July 23, 2009

Nanophotonics market may reach $40B in five years

A release from the inbox:

Global Nanophotonic Market Worth US$37.6 Billion by 2014

WILMINGTON, Delaware, July 23/PRNewswire/ –     According to a new market research report, ‘Nanophotonics – Advanced
Technologies and Global Market (2009-2014)’, published by MarketsandMarkets
(http://www.marketsandmarkets.com), the global nanophotonics market is
expected to be worth US$3.6 billion by 2014, out of which the Asian market
will account for nearly 74% of the total revenues. The global market is
expected to record a CAGR of 100.7% from 2009 to 2014.

    Browse 134 market data tables and in-depth TOC on nanophotonics market.
Early buyers will receive 10% customization of reports
http://www.marketsandmarkets.com/Market-Reports/nanophotonics-advanced-techno
logies-and-global-market-125.html

    (Due to the length of the URL in the above paragraph, it may be necessary
 to copy and paste this hyperlink into your Internet browser’s URL address
field. Remove the space if one exists.)

    Nanophotonics (http://www.marketsandmarkets.com/Market-Reports/
nanophotonics-advanced-technologies-and-global-market-125.html) is born out
of the combination of three major sciences:photonics, nanotechnology,
and optoelectronics. While photonics and optoelectronics have revolutionized
the electronics and semiconductors market, nanotechnology has the greatest
potential for further improvement, and hence has emerged as the most
sought-after technology by big companies and research laboratories. In spite
of it being in the nascent stage, nanophotonics is expected to make it to
the mainstream market owing to the higher power efficiency, thermal
resistivity, and operational life.

    (Due to the length of the URL in the above paragraph, it may be necessary
 to copy and paste this hyperlink into your Internet browser’s URL address
field. Remove the space if one exists.)

    The nanophotonic component market is growing at a robust rate for the
last few years and is expected to maintain a very high CAGR for the next few
years. The market is expected to reach US$3.6 billion in 2014 at a CAGR of
100.7% from 2009 to 2014.

    Asia holds a major share of the global nanophotonics market. However, the
U.S. and Europe represent very high growth rate of 161.1% and 160.0%,
respectively, from 2009 to 2014. The U.S. and Europe assume further
importance because of the large consumer base for the nanophotonic devices.
Extensive investment in research and development for the application of
nanophotonics in increasing number of application areas has become the main
driver for this market

    The LED market is the largest segment; and is expected to reach US$2.7
billion by 2014 at a CAGR of 91.3%. Optical amplifier and holographic memory
device markets are estimated to record growth rate of 239% and 234.6%
respectively from 2009 to 2014. The high growth rate of nanophotonics
products is mainly due to high demand from Asian countries.

    The Asian market is the largest geographical segment; and is expected to
be worth US$2.7 billion by 2014. The second largest segment is Europe, with a
CAGR of 160.0%. However, market size of the U.S. is expected to increase at
the highest CAGR of 161.1% from the year 2009 to 2014.

    The report is titled ‘Nanophotonics- Advanced Technologies and Global
Market (2009 – 2014)’ and was published in June 2009.

    Scope of the Report

    This report aims to identify and analyze products, applications and
ingredients for nanophotonics market. The report segments the nanophotonics
product market as follows:

    Nanophotonics components – products

    Nanophotonic LED, nanophotonic OLED, nanophotonic near field optics,
nanophotonic photovoltaic cells, nanophotonic optical amplifiers,
nanophotonic optical switches and nanophotonic holographic data storage
system.

    Nanophotonics – applications
    Indicators and signs, lighting, non-visual applications,
telecommunications, entertainment and consumer electronics

    Nanophotonics – ingredients

Photonic crystals, plasmonics, nanotubes, nanoribbons and quantum dots.

    About MarketsandMarkets

    MarketsandMarkets is a research and consulting firm that publishes 120
market research (http://www.marketsandmarkets.com/) reports per year. Each
strategically analyzed report contains 250 pages of valuable market data,
including more than 100 market data summary tables and in-depth, five-level
segmentation for each of the products, services, applications, technologies,
ingredients and stakeholders categories. Our reports also analyze about 200
patents, over 50 companies and micro markets that are mutually exclusive and
collectively exhaustive. Browse all our 120 titles at
http://www.marketsandmarkets.com.

Source: MarketsandMarkets

June 5, 2009

Graphene beats copper in IC connections

It’s been a while since I’ve had the chance to blog about graphene, but here is the latest on the carbon nanomaterial.  (Be sure to hit the second link for images.)

The release:

Graphene May Have Advantages Over Copper for Future IC Interconnects

New Material May Replace Traditional Metal at Nanoscale Widths

Atlanta (June 4, 2009) —The unique properties of thin layers of graphite—known as graphene—make the material attractive for a wide range of potential electronic devices. Researchers have now experimentally demonstrated the potential for another graphene application: replacing copper for interconnects in future generations of integrated circuits.

In a paper published in the June 2009 issue of the IEEE journal Electron Device Letters, researchers at the Georgia Institute of Technology report detailed analysis of resistivity in graphene nanoribbon interconnects as narrow as 18 nanometers.

The results suggest that graphene could out-perform copper for use as on-chip interconnects—tiny wires that are used to connect transistors and other devices on integrated circuits. Use of graphene for these interconnects could help extend the long run of performance improvements for silicon-based integrated circuit technology.

“As you make copper interconnects narrower and narrower, the resistivity increases as the true nanoscale properties of the material become apparent,” said Raghunath Murali, a research engineer in Georgia Tech’s Microelectronics Research Center and the School of Electrical and Computer Engineering. “Our experimental demonstration of graphene nanowire interconnects on the scale of 20 nanometers shows that their performance is comparable to even the most optimistic projections for copper interconnects at that scale. Under real-world conditions, our graphene interconnects probably already out-perform copper at this size scale.”

Beyond resistivity improvement, graphene interconnects would offer higher electron mobility, better thermal conductivity, higher mechanical strength and reduced capacitance coupling between adjacent wires.

“Resistivity is normally independent of the dimension—a property inherent to the material,” Murali noted. “But as you get into the nanometer-scale domain, the grain sizes of the copper become important and conductance is affected by scattering at the grain boundaries and at the side walls. These add up to increased resistivity, which nearly doubles as the interconnect sizes shrink to 30 nanometers.”

The research was supported by the Interconnect Focus Center, which is one of the Semiconductor Research Corporation/DARPA Focus Centers, and the Nanoelectronics Research Initiative through the INDEX Center.

Murali and collaborators Kevin Brenner, Yinxiao Yang, Thomas Beck and James Meindl studied the electrical properties of graphene layers that had been taken from a block of pure graphite. They believe the attractive properties will ultimately also be measured in graphene fabricated using other techniques, such as growth on silicon carbide, which now produces graphene of lower quality but has the potential for achieving higher quality.

Because graphene can be patterned using conventional microelectronics processes, the transition from copper could be made without integrating a new manufacturing technique into circuit fabrication.

“We are optimistic about being able to use graphene in manufactured systems because researchers can already grow layers of it in the lab,” Murali noted. “There will be challenges in integrating graphene with silicon, but those will be overcome. Except for using a different material, everything we would need to produce graphene interconnects is already well known and established.”

Experimentally, the researchers began with flakes of multi-layered graphene removed from a graphite block and placed onto an oxidized silicon substrate. They used electron beam lithography to construct four electrode contacts on the graphene, then used lithography to fabricate devices consisting of parallel nanoribbons of widths ranging between 18 and 52 nanometers. The three-dimensional resistivity of the nanoribbons on 18 different devices was then measured using standard analytical techniques at room temperature.

The best of the graphene nanoribbons showed conductivity equal to that predicted for copper interconnects of the same size. Because the comparisons were between non-optimized graphene and optimistic estimates for copper, they suggest that performance of the new material will ultimately surpass that of the traditional interconnect material, Murali said.

“Even graphene samples of moderate quality show excellent properties,” he explained. “We are not using very high levels of optimization or especially clean processes. With our straightforward processing, we are getting graphene interconnects that are essentially comparable to copper. If we do this more optimally, the performance should surpass copper.”

Though one of graphene’s key properties is reported to be ballistic transport—meaning electrons can flow through it without resistance—the material’s actual conductance is limited by factors that include scattering from impurities, line-edge roughness and from substrate phonons—vibrations in the substrate lattice.

Use of graphene interconnects could help facilitate continuing increases in integrated circuit performance once features sizes drop to approximately 20 nanometers, which could happen in the next five years, Murali said. At that scale, the increased resistance of copper interconnects could offset performance increases, meaning that without other improvements, higher density wouldn’t produce faster integrated circuits.

“This is not a roadblock to achieving scaling from one generation to the next, but it is a roadblock to achieving increased performance,” he said. “Dimensional scaling could continue, but because we would be giving up so much in terms of resistivity, we wouldn’t get a performance advantage from that. That’s the problem we hope to solve by switching to a different materials system for interconnects.”

April 6, 2009

April 2009 media tips from Oak Ridge National Laboratory

The latest story ideas coming out of Oak Ridge National Laboratory.

The release:

April 2009 Story Tips

Story ideas from the Department of Energy’s Oak Ridge National Laboratory.

Sensors—Math to the rescue . . .

Making sense of the enormous amounts of information delivered by all types of sensors is an incredible challenge, but it’s being met head on with knowledge discovery techniques developed at Oak Ridge National Laboratory. Some of the strategies and approaches are outlined in a recently published book, “Knowledge Discovery from Sensor Data,” (http://books.google.com/books?id=dq7uAA3ssPcC) edited by a team led by Auroop Ganguly of ORNL’s Computational Sciences and Engineering Division. The book is specifically aimed at analyzing dynamic data streams from sensors that are geographically distributed. “We are especially interested in looking for changes – even ones that are very gradual — and anomalies,” Ganguly said. This work helps to validate and assign uncertainties to models developed to understand issues related to climate, transportation and biomass. Co-authors include Olufemi Omitaomu and Ranga Raju Vatsavai of ORNL. This research was originally funded by the Laboratory Directed Research and Development program. 

Cyber Security—Meeting of minds . . .

Dozens of the nation’s authorities on cyber security will be participating in the Fifth Cyber Security and Information Intelligence Research Workshop April 13-15 (http://www.ioc.ornl.gov/csiirw). The focus of this event, which is open to the public, is to discuss novel theoretical and empirical research to advance the field. “We aim to challenge, establish and debate a far-reaching agenda that broadly and comprehensively outlines a strategy for cyber security and information intelligence that is founded on sound principles and technologies,” said Frederick Sheldon, general chair and a member of Oak Ridge National Laboratory’s Computational Sciences and Engineering Division, a sponsor of the workshop. Other sponsors are the University of Tennessee and the Federal Business Council. The workshop, hosted by ORNL, is being held in cooperation with the Association for Computing Machinery. 

Material—Graphene cleanup . . .

Graphene, a single-layer sheet of graphite, has potential as a remarkable material, particularly for electronics and composite applications. However, working with the material leaves molecular-scale rough edges, which can spoil its properties. Researchers at MIT and the Laboratory for Nanoscience and Nanotechnology Research (LINAN) and Advanced Materials Department in San Luis Potosi, Mexico have been working with graphitic nanoribbons. Separate research performed at the Department of Energy’s Oak Ridge National Laboratory developed theory-based computer simulations with quantum mechanical calculations that explain how a process called Joule heating cleans up graphene as the rough carbon edges vaporize and then reconstruct at higher, voltage-induced temperatures. The collaborative project was recently described in Science magazine. 

Energy—Tighten up . . .

An effort to gather environmental data related to the energy efficiency of buildings through weatherization technologies will be conducted in a joint project that includes Oak Ridge National Laboratory’s Building Technologies, Research and Integration Center. ORNL engineer Andre Desjarlais says his group’s research will focus on the study of a building’s air tightness by monitoring unintended air movement – air leakage – between outdoors and indoors. In heating climates, up to 30 percent of the energy used in a building can be attributed to air leakage. The tests will be conducted at Syracuse University, which is also a partner. Other partners are the Air Barrier Association of America and it members, along with the New York State Energy Office. The DOE funding source is the Office of Building Technologies.

The Silver is the New Black Theme Blog at WordPress.com.

Follow

Get every new post delivered to your Inbox.

Join 26 other followers